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Parity, circuits, and the polynomial-time hierarchy. (English) Zbl 0534.94008
The authors investigate lower bounds on the size of Boolean circuits computing parity, multiplication and transitive closure. It is already known [O. B. Lupanov, Probl. Kibern. 6, 5-14 (1961; Zbl 0178.331)] that Boolean circuits of depth 2 computing the parity function must have an exponential number of gates (in the number of the variables). The authors investigate the more general case of constant depth and show, that the number of gates for the computation of the parity function cannot be polynomial. By reduction it is shown, that also some other problems are not computable by polynomial-size constant-depth circuits. For this purpose the authors define: f is constant-depth polynomial-size reducible to g ($f{\le }_{cp}g\right)$ if f can be realized with constant-depth polynomial-size circuits on literals, made up of $\wedge$, $\vee$, - gates and gates computing g. It is shown, that parity can be ${\le }_{cp}$-reduced to multiplication and to the transitive closure problem for Boolean matrices; thus multiplication and transitive closure are not computable by constant-depth polynomial-size circuits. Furthermore the authors give an application to the polynomial time hierarchy PH $\left(P{H}^{A}:$ the hierarchy relativized by the oracle A); using the complexity of the parity function, they show that there is an oracle A such that $PSPAC{E}^{A}-P{H}^{A}\ne \varnothing$.
Reviewer: A.Leitsch

MSC:
 94C10 Switching theory, application of Boolean algebra; Boolean functions 68Q25 Analysis of algorithms and problem complexity 03D15 Complexity of computation
References:
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