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Architecture exploration for embedded processors with LISA. (English) Zbl 1011.68011

Boston, MA: Kluwer Academic Publishers. viii, 230 p. (2002).
Today more than \(90\%\) of all programmable processors are employed in imbedded systems. The question arises why programmable processors are so popular in embedded system design. The answer lies in the fact that they help to narrow the gap between chip capacity and designer productivity. The LISA (Language for Instruction-Set Architecture) processor design platform (LPDP) presented in this book addresses recent design challenges and results in highly satisfactory solutions. The LPDP covers all major high-level phases of embedded processor design and is capable of automatically generating almost all required software development tools from processor models in the LISA language. It supports a profiling-based, stepwise refinement of processor models down to cycle-accurate and even RTL synthesis models. Moreover, it elegantly avoids model inconsistencies otherwise omnipresent in traditional design flows.
The book is organized as follows: Ch. 2, Traditional ASIP design methodology, illustrates the traditional design process of embedded processors, and reviews existing approaches and closes with the motivation of the work covered within this book. Ch. 3, Processor models for ASIP design, works out different processor models which are captured within the LISA language underlying this work. These processor models are required to address different aspects of the processor design: retargeting of software development tools, generation of hardware implementation model, and system integration and verification. Besides, the capability of the language to abstract from the processor architecture on various levels in the domain of architecture and time is shown. In Ch. 4, LISA processor design platform is introduced, which has been developed in the last five years at the Institute for Integrated Signal Processing Systems at Aachen University of Technology and is now commercialized at LISATek Inc. LPDP comprises the automatic generation of software development tools for architecture exploration, hardware implementation, software development tools for application design, and co-simulation interfaces from one sole specification of the target architecture in the LISA language. Ch. 5, Architecture exploration, shows the general work-flow in the design process of ASIPs and presents LISA code segments and tools provided by LPDP supporting this. In a case study, a sample exploration is carried out for a CORDIC angle calculation, and a simple ASIP efficiently executing this algorithm is developed.
Ch. 6, Architecture implementation, deals with the next phase in ASIP design in which the micro-architecture needs to be specified in a hardware description language like VHDL or Verilog and taken through synthesis. It is shown that large parts of the LISA model resulting from the architecture exploration phase can be reused to generate those parts of the implementation model that are tedious and error-prone to write, but have minor influence on the overall performance of the target architecture – structure, decoder, and controller. A case study carried out with Infineon Technologies on an ASIP for digital video broadcast terrestrial proves the presented concept. Following the phases primarily addressing the architecture design, Ch. 7, Software tools for application design, focuses on software development tools required to program the architecture. Particular emphasis is on different simulation techniques offered by LPDP, which have varying strengths and weaknesses depending on the target architecture and application domain. Again, case studies carried out with real-world DSP and micro-controller architectures shows the quality of the tools by comparing them to the tools provided by the respective architecture vendor. Ch. 8, System integration and verification, addresses the issue of system integration and verification of the processor. The integration of processor simulators into the commercial CoCentric System Studio environment of Synopsys is demonstrated. The book closes with Ch. 9, Summary and outlook on open issues and interesting future research topics. Appendices present information on abbreviations used within this book, the grammar of the LISA language, a sample LISA model of the ARM7/\(\mu\)C architecture, and some details on the ICORE architecture used in the case study on HDL-code generation from LISA.

MSC:

68M99 Computer system organization
68N15 Theory of programming languages
68U99 Computing methodologies and applications
68-01 Introductory exposition (textbooks, tutorial papers, etc.) pertaining to computer science

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