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Clock conversion in sequential machines and the synthesis of relay networks. (English. Russian original) Zbl 0135.18204
Autom. Remote Control 23, 1376-1398 (1963); translation from Avtom. Telemekh. 23, 1465-1491 (1962).
Summary: An algorithm is proposed for constructing a minimal-state sequential machine operating at a certain (“fast”) clock rate and reproducing a given sequential machine which operating at a rate defined by changes in the input state. The algorithm may be used for the synthesis of relay networks.
MSC:
93C83 Control/observation systems involving computers (process control, etc.)
94C05 Analytic circuit theory
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