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Shrinking timed automata. (English) Zbl 1246.68159
Chakraborthy, Supraik (ed.) et al., IARCS annual conference on foundations of software technology and theoretical computer science (FSTTCS 2011), Mumbai, India, December 12–14, 2011. Wadern: Schloss Dagstuhl – Leibniz Zentrum für Informatik (ISBN 978-3-939897-34-7). LIPIcs – Leibniz International Proceedings in Informatics 13, 90-102, electronic only (2011).
Summary: We define and study a new approach to the implementability of timed automata, where the semantics is perturbed by imprecisions and finite frequency of the hardware. In order to circumvent these effects, we introduce parametric shrinking of clock constraints, which corresponds to tightening these. We propose symbolic procedures to decide the existence of (and then compute) parameters under which the shrunk version of a given timed automaton is non-blocking and can time-abstract simulate the exact semantics. We then define an implementation semantics for timed automata with a digital clock and positive reaction times, and show that for shrinkable timed automata, non-blockingness and time-abstract simulation are preserved in implementation.
For the entire collection see [Zbl 1237.68015].

MSC:
68Q60 Specification and verification (program logics, model checking, etc.)
68Q45 Formal languages and automata
68N30 Mathematical aspects of software engineering (specification, verification, metrics, requirements, etc.)
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