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Design and implementation of an accelerated Gabor filter bank using parallel hardware. (English) Zbl 1005.68984

Brebner, Gordon (ed.) et al., Field-programmable logic and applications. 11th international conference, FPL 2001, Belfast, Northern Ireland, GB, August 27-29, 2001. Proceedings. Berlin: Springer. Lect. Notes Comput. Sci. 2147, 451-460 (2001).
Summary: In computer vision, images are often preprocessed by the so-called Gabor transform. Using a Gabor filter bank, an image can be decomposed into orientational components lying in a specified frequency range. This biologically motivated decomposition simplifies higher level image processing like extraction of contours or pattern recognition. However, the IEEE floating-point implementation of this filter is too slow for real-time image-processing, especially if mobile applications with limited resources are targeted. This paper describes how this can be overcome by a hardware-implementation of the filter algorithm. The actual implementation is preceded by an analysis of the algorithm analyzing the effects of reduced-accuracy calculus and the possibility of parallelizing the process. The target device is a Xilinx Virtex FPGA which resides on a PCI rapid-prototyping board.
For the entire collection see [Zbl 0972.68674].

MSC:

68U99 Computing methodologies and applications
68T45 Machine vision and scene understanding
68M07 Mathematical problems of computer architecture

Software:

Khoros
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