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Accelerating AES with vector permute instructions. (English) Zbl 1290.94082
Clavier, Christophe (ed.) et al., Cryptographic hardware and embedded systems – CHES 2009. 11th international workshop Lausanne, Switzerland, September 6–9, 2009. Proceedings. Berlin: Springer (ISBN 978-3-642-04137-2/pbk). Lecture Notes in Computer Science 5747, 18-32 (2009).
Summary: We demonstrate new techniques to speed up the Rijndael (AES) block cipher using vector permute instructions. Because these techniques avoid data- and key-dependent branches and memory references, they are immune to known timing attacks. This is the first constant-time software implementation of AES which is efficient for sequential modes of operation. This work can be adapted to several other primitives using the AES S-box such as the stream cipher LEX, the block cipher Camellia and the hash function Fugue. We focus on Intel’s SSSE3 and Motorola’s Altivec, but our techniques can be adapted to other systems with vector permute instructions, such as the IBM Xenon and Cell processors, the ARM Cortex series and the forthcoming AMD “Bulldozer” core.
For the entire collection see [Zbl 1172.68301].
94A60 Cryptography
68P25 Data encryption (aspects in computer science)
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