Systolic tree architecture for some standard functions. (English) Zbl 0633.68043

Culik, Karel II; Jürgensen, Helmut; Mak, Kenneth

Comput. Artif. Intell. 6, 243-261 (1987).

Systolic trees with feed-back as a computing model for VLSI are introduced. They are a generalization of systolic tree automata [the first author, J. Gruska and A. Salomaa, Acta Inf. 18, 335-344 (1983; Zbl 0493.68054), the first author, A. Salomaa and D. Wood, RAIRO, Inf. Théor. 18, 53-69 (1984; Zbl 0571.68043)] in the following two directions: (1) A cycle of the length 2 is added to the root of the tree, i.e., the system can work longer than the high of the tree is. (2) Each leaf of the tree can be used as input processor for several input values.
Implementing several interesting functions on systolic trees with feedback or on like systolic structures the power of this efficient hardware realization is presented.

Reviewer: J.Hromkovič

MSC:

68Q80

Cellular automata (computational aspects)

Keywords:

parallel computations; computing model for VLSI; systolic tree automata; hardware realization

Citations:

Zbl 0493.68054; Zbl 0571.68043