Formal verification of integer multiplier circuits using algebraic reasoning: a survey. (English) Zbl 07410738

Drechsler, Rolf (ed.) et al., Recent findings in Boolean techniques. Selected papers from the 14th international workshop on Boolean problems, IWSBP, virtual, September 24–25, 2020. Cham: Springer. 1-27 (2021).
Summary: Digital circuits are extensively used in computers and digital systems and it is of high importance to guarantee that these circuits are correct in order to prevent issues like the famous Pentium FDIV bug. Formal verification can be used to derive the correctness of a given circuit with respect to a certain specification. However arithmetic circuits, and most prominently multipliers, impose a challenge for existing verification techniques. Currently one of the most effective techniques is based on algebraic reasoning. In this approach the circuit is modeled as a set of pseudo-Boolean polynomials and the word-level specification is reduced by a Gröbner basis, which is implied by the polynomial representation of the circuit. The circuit is correct if and only if the final result is zero. Nonetheless the verification process might not be error-free. Generating and automatically checking proofs independently increases confidence in the results of automated reasoning tools. In this paper we survey the current state of the art of this work. We give an overview over recent solving techniques, available benchmarks, and include a comprehensive evaluation.
For the entire collection see [Zbl 1470.94002].


68V15 Theorem proving (automated and interactive theorem provers, deduction, resolution, etc.)
68Q06 Networks and circuits as models of computation; circuit complexity


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