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VHDL: language, modelling, synthesis. 2ème éd. (VHDL: langage, modélisation, synthèse.) (French) Zbl 0902.68020
Collection Informatique. Lausanne: Presses Poltechniques et Universitaires Romandes. xv, 568 p. (1998).
The book, which is written in French, gives an introduction to VHDL. VHDL stands for VHSIC (Very High Speed Integrated Circuits) Hardware Description Language which allows to model and to simulate circuits at a high level of abstraction. Synthesis tools take such a description and automatically translate it into schematics and hardware. The book consists of three parts. The first part presents the language by its syntax. The concepts are explained by very small examples showing how to apply the concepts of VHDL. Faulty programs are presented to emphasize the pitfalls when working with VHDL. In the second part of the book VHDL is introduced with practical design examples as e.g. data paths, linear circuits, stacks, random access memories, read only memories and neural networks. The book discusses how to model them with VHDL. The last part of the book discusses VHDL with respect to synthesis. The book is well written and defines VHDL as Very Handy Description Language for designing and modeling circuits.
Reviewer: P.Molitor (Halle)
MSC:
68M99 Computer system organization
68-01 Introductory exposition (textbooks, tutorial papers, etc.) pertaining to computer science
68N15 Theory of programming languages
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