Estimating the latent time of fault detection in finite automaton tested in real time. (English. Russian original) Zbl 1155.93390

Autom. Remote Control 69, No. 10, 1765-1777 (2008); translation from Avtom. Telemekh. 2008, No. 10, 128-141 (2008).
Summary: The notions of potential and real latent times of fault detection in finite automata were introduced. The potential latent time is the minimal theoretical time of automaton fault detection, the real time is defined as the time of fault manifestation at a certain point. A method for determination of the statistical characteristics of both times for the automaton tested in the course of its real operation was proposed. It is based on selection of the trajectories of the Markov chain describing behavior of the operable and faulty automata. Additionally, a method for determination of the upper bound of the mean latent time in the case of limited information about the automaton characteristics was proposed.


93C83 Control/observation systems involving computers (process control, etc.)
93E10 Estimation and detection in stochastic control theory
93A30 Mathematical modelling of systems (MSC2010)
60J10 Markov chains (discrete-time Markov processes on discrete state spaces)
Full Text: DOI


[1] Lala, P., Self-Checking and Fault Tolerant Digital Design, San Francisco: Morgan Kaufman, 2000.
[2] Shedletsky, J. and McCluskey, E., The Error Latency of Fault in a Sequential Digital Circuit, IEEE Trans. Comput., 1976, vol. 25, no. 6, pp. 655–659. · Zbl 0334.94009
[3] Goot, R., Levin, I., and Ostanin, S., Fault Latencies of Concurrent Checking FSMs, in Proc. DSD 2002 Euromicro Sympos. Digital Syst. Design Architectures, Methods and Tools, Dortmund, pp. 174–179.
[4] Feller, W., An Introduction to Probability Theory and Its Applications, New York: Wiley, 1971. · Zbl 0219.60003
[5] Kemeny, J. and Snell, J., Finite Markov Chains, Princeton: Van Nostrand, 1967. · Zbl 0153.19703
[6] Nicolaidis, M. and Zorian, Y., On-line Testing for VLSI–A Compendium of Approaches, J. Electron. Testing: Theory Appl., 1998, no. 12, pp. 7–20.
[7] Levin, I. and Sinelnikov, V., Self-checking of FPGA based Control Units, in Proc. Great Lakes Sympos. VLSI, Ann Arbor: IEEE Press, 1999, pp. 292–295.
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