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Low-power analog channel selection filtering techniques. (English) Zbl 1386.94116

Summary: Various techniques to reduce power consumption in the channel selection filtering of wireless receivers are discussed. They include class AB operation by the use of quasi-floating gate transistors and reuse of circuital blocks. A mixed continuous/discrete frequency tuning approach set by a simple on-chip automatic tuning circuit is also presented, which allows wide tuning range with modest area and power requirements. The techniques presented are illustrated by a third-order CMOS Gm-C channel filter designed for a dual-mode Bluetooth/ZigBee zero-IF receiver, with two different on-chip automatic tuning circuits. Measurement results for a test chip prototype in a 0.5- \({\mu }\)m CMOS process are presented, showing in-band filter IIP3 >20 dBVp with a power consumption of 3.65 mW for both Bluetooth and ZigBee modes, and the required frequency tuning range set by the automatic tuning circuits.

MSC:

94C05 Analytic circuit theory
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