Prajapati, Arvind Kumar; Prasad, Rajendra A new generalized pole clustering-based model reduction technique and its application for design of controllers. (English) Zbl 1509.93016 Circuits Syst. Signal Process. 41, No. 3, 1497-1529 (2022). MSC: 93B51 93C05 PDFBibTeX XMLCite \textit{A. K. Prajapati} and \textit{R. Prasad}, Circuits Syst. Signal Process. 41, No. 3, 1497--1529 (2022; Zbl 1509.93016) Full Text: DOI
Salehi, Zeinab; Karimaghaee, Paknoosh; Khooban, Mohammad-Hassan Model order reduction of positive real systems based on mixed Gramian balanced truncation with error bounds. (English) Zbl 1509.93002 Circuits Syst. Signal Process. 40, No. 11, 5309-5327 (2021). MSC: 93B11 93C28 93C57 93C42 93D05 PDFBibTeX XMLCite \textit{Z. Salehi} et al., Circuits Syst. Signal Process. 40, No. 11, 5309--5327 (2021; Zbl 1509.93002) Full Text: DOI
Prajapati, Arvind Kumar; Rayudu, V. G. Durgarao; Sikander, Afzal; Prasad, Rajendra A new technique for the reduced-order modelling of linear dynamic systems and design of controller. (English) Zbl 1485.93099 Circuits Syst. Signal Process. 39, No. 10, 4849-4867 (2020). MSC: 93B11 93C05 93D05 PDFBibTeX XMLCite \textit{A. K. Prajapati} et al., Circuits Syst. Signal Process. 39, No. 10, 4849--4867 (2020; Zbl 1485.93099) Full Text: DOI
Xu, Ling; Song, Guanglei A recursive parameter estimation algorithm for modeling signals with multi-frequencies. (English) Zbl 1452.94026 Circuits Syst. Signal Process. 39, No. 8, 4198-4224 (2020). MSC: 94A12 PDFBibTeX XMLCite \textit{L. Xu} and \textit{G. Song}, Circuits Syst. Signal Process. 39, No. 8, 4198--4224 (2020; Zbl 1452.94026) Full Text: DOI
Prajapati, Arvind Kumar; Prasad, Rajendra A new model reduction method for the linear dynamic systems and its application for the design of compensator. (English) Zbl 1448.93040 Circuits Syst. Signal Process. 39, No. 5, 2328-2348 (2020). MSC: 93B11 93A15 93B55 93C05 PDFBibTeX XMLCite \textit{A. K. Prajapati} and \textit{R. Prasad}, Circuits Syst. Signal Process. 39, No. 5, 2328--2348 (2020; Zbl 1448.93040) Full Text: DOI
Jhohura, Fatema Tuz; Howlader, Tamanna; Rahman, S. M. Mahbubur Bayesian fusion of ensemble of multifocused noisy images. (English) Zbl 1342.94021 Circuits Syst. Signal Process. 34, No. 7, 2287-2308 (2015). MSC: 94A08 PDFBibTeX XMLCite \textit{F. T. Jhohura} et al., Circuits Syst. Signal Process. 34, No. 7, 2287--2308 (2015; Zbl 1342.94021) Full Text: DOI
Leulmi, Fouzia; Ferdi, Youcef Improved digital rational approximation of the operator \(S^\alpha\) using second-order s-to-z transform and signal modeling. (English) Zbl 1358.94029 Circuits Syst. Signal Process. 34, No. 6, 1869-1891 (2015). MSC: 94A12 PDFBibTeX XMLCite \textit{F. Leulmi} and \textit{Y. Ferdi}, Circuits Syst. Signal Process. 34, No. 6, 1869--1891 (2015; Zbl 1358.94029) Full Text: DOI
Balasubramaniam, P.; Nagamani, G. A delay decomposition approach to delay-dependent robust passive control for Takagi-Sugeno fuzzy nonlinear systems. (English) Zbl 1267.93092 Circuits Syst. Signal Process. 31, No. 4, 1319-1341 (2012). MSC: 93C42 34K20 93D09 PDFBibTeX XMLCite \textit{P. Balasubramaniam} and \textit{G. Nagamani}, Circuits Syst. Signal Process. 31, No. 4, 1319--1341 (2012; Zbl 1267.93092) Full Text: DOI
Lu, Renquan; Li, Hui; Zhu, Yaping Quantized \(H _{\infty }\) filtering for singular time-varying delay systems with unreliable communication channel. (English) Zbl 1253.94008 Circuits Syst. Signal Process. 31, No. 2, 521-538 (2012). MSC: 94A05 93E11 PDFBibTeX XMLCite \textit{R. Lu} et al., Circuits Syst. Signal Process. 31, No. 2, 521--538 (2012; Zbl 1253.94008) Full Text: DOI
Cauet, S.; Hutu, F.; Coirault, P. Time-varying delay passivity analysis in 4 GHz antennas array design. (English) Zbl 1252.94124 Circuits Syst. Signal Process. 31, No. 1, 93-106 (2012). MSC: 94C05 93D05 94A12 PDFBibTeX XMLCite \textit{S. Cauet} et al., Circuits Syst. Signal Process. 31, No. 1, 93--106 (2012; Zbl 1252.94124) Full Text: DOI
Cintra, R. J. An integer approximation method for discrete sinusoidal transforms. (English) Zbl 1238.65121 Circuits Syst. Signal Process. 30, No. 6, 1481-1501 (2011). MSC: 65R10 44A15 65T50 PDFBibTeX XMLCite \textit{R. J. Cintra}, Circuits Syst. Signal Process. 30, No. 6, 1481--1501 (2011; Zbl 1238.65121) Full Text: DOI arXiv
Maheshwari, Sudhanshu; Mohan, Jitendra; Chauhan, Durg Singh Novel cascadable all-pass/notch filters using a single FDCCII and grounded capacitors. (English) Zbl 1213.94209 Circuits Syst. Signal Process. 30, No. 3, 643-654 (2011). MSC: 94C99 93E11 PDFBibTeX XMLCite \textit{S. Maheshwari} et al., Circuits Syst. Signal Process. 30, No. 3, 643--654 (2011; Zbl 1213.94209) Full Text: DOI
Minaei, Shahram; Yuce, Erkan Novel voltage-mode all-pass filter based on using DVCCs. (English) Zbl 1191.94154 Circuits Syst. Signal Process. 29, No. 3, 391-402 (2010). MSC: 94C05 PDFBibTeX XMLCite \textit{S. Minaei} and \textit{E. Yuce}, Circuits Syst. Signal Process. 29, No. 3, 391--402 (2010; Zbl 1191.94154) Full Text: DOI
Yuce, Erkan A novel CMOS-based voltage-mode first-order phase shifter employing a grounded capacitor. (English) Zbl 1190.94047 Circuits Syst. Signal Process. 29, No. 2, 235-245 (2010). MSC: 94C05 PDFBibTeX XMLCite \textit{E. Yuce}, Circuits Syst. Signal Process. 29, No. 2, 235--245 (2010; Zbl 1190.94047) Full Text: DOI
Basin, Michael; Shi, Peng; Calderon-Alvarez, Dario; Wang, Jianfei Central suboptimal \(H_\infty\) filter design for linear time-varying systems with state or measurement delay. (English) Zbl 1173.93011 Circuits Syst. Signal Process. 28, No. 2, 305-330 (2009). MSC: 93B36 93C10 PDFBibTeX XMLCite \textit{M. Basin} et al., Circuits Syst. Signal Process. 28, No. 2, 305--330 (2009; Zbl 1173.93011) Full Text: DOI
Sagbas, M.; Ayten, U. E.; Sedef, H.; Koksal, M. Floating immittance function simulator and its applications. (English) Zbl 1162.94423 Circuits Syst. Signal Process. 28, No. 1, 55-63 (2009). MSC: 94C05 PDFBibTeX XMLCite \textit{M. Sagbas} et al., Circuits Syst. Signal Process. 28, No. 1, 55--63 (2009; Zbl 1162.94423) Full Text: DOI
Wang, Fang Ming; Yip, P. Fast prime factor decomposition algorithms for a family of discrete trigonometric trigonometric transforms. (English) Zbl 0747.65101 Circuits Syst. Signal Process. 8, No. 4, 402-419 (1989). MSC: 65T50 65Y20 PDFBibTeX XMLCite \textit{F. M. Wang} and \textit{P. Yip}, Circuits Syst. Signal Process. 8, No. 4, 402--419 (1989; Zbl 0747.65101) Full Text: DOI
Yip, P.; Rao, K. R. Fast decimation-in-time algorithms for a family of discrete sine and cosine transforms. (English) Zbl 0572.65120 Circuits Syst. Signal Process. 3, 387-408 (1984). Reviewer: Y.Kobayashi MSC: 65T40 42A38 68W99 68Q25 PDFBibTeX XMLCite \textit{P. Yip} and \textit{K. R. Rao}, Circuits Syst. Signal Process. 3, 387--408 (1984; Zbl 0572.65120) Full Text: DOI
Halijak, Charles A.; Wang, R. H. A semi-nonsingular sampled data model of a delayor. (English) Zbl 0509.93046 Circuits Syst. Signal Process. 2, 155-160 (1983). MSC: 93C57 44A15 44A55 68U20 PDFBibTeX XMLCite \textit{C. A. Halijak} and \textit{R. H. Wang}, Circuits Syst. Signal Process. 2, 155--160 (1983; Zbl 0509.93046) Full Text: DOI