Chakraborty, Bidesh; Dalui, Mamata; Sikdar, Biplab K. Synthesis of scalable single length cycle, single attractor cellular automata in linear time. (English) Zbl 1474.68198 Complex Syst. 30, No. 3, 415-439 (2021). MSC: 68Q80 37B15 68Q25 68W35 94C11 PDF BibTeX XML Cite \textit{B. Chakraborty} et al., Complex Syst. 30, No. 3, 415--439 (2021; Zbl 1474.68198) Full Text: Link OpenURL
Donovan, Z.; Subramani, K.; Mkrtchyan, V. Analyzing clustering and partitioning problems in selected VLSI models. (English) Zbl 07357722 Theory Comput. Syst. 64, No. 7, 1242-1272 (2020). MSC: 68R10 68Q25 68U07 68W05 68W25 68W40 94C11 PDF BibTeX XML Cite \textit{Z. Donovan} et al., Theory Comput. Syst. 64, No. 7, 1242--1272 (2020; Zbl 07357722) Full Text: DOI OpenURL
Kolasa, Marta; Długosz, Rafał; Talaśka, Tomasz; Pedrycz, Witold Efficient methods of initializing neuron weights in self-organizing networks implemented in hardware. (English) Zbl 1427.68276 Appl. Math. Comput. 319, 31-47 (2018). MSC: 68T07 68T05 68W35 PDF BibTeX XML Cite \textit{M. Kolasa} et al., Appl. Math. Comput. 319, 31--47 (2018; Zbl 1427.68276) Full Text: DOI OpenURL
Berryhill, Ryan; Veneris, Andreas Efficient suspect selection in unreachable state diagnosis. (English) Zbl 1393.94974 Ann. Math. Artif. Intell. 82, No. 4, 261-277 (2018). MSC: 94C12 68W35 PDF BibTeX XML Cite \textit{R. Berryhill} and \textit{A. Veneris}, Ann. Math. Artif. Intell. 82, No. 4, 261--277 (2018; Zbl 1393.94974) Full Text: DOI OpenURL
Yang, Zhiming; Li, Junbao; Yu, Yang; Peng, Xiyuan NBTI-aware transient fault rate analysis method for logic circuit based on probability voltage transfer characteristics. (English) Zbl 1461.94107 Algorithms (Basel) 9, No. 1, Paper No. 9, 14 p. (2016). MSC: 94C11 94C12 PDF BibTeX XML Cite \textit{Z. Yang} et al., Algorithms (Basel) 9, No. 1, Paper No. 9, 14 p. (2016; Zbl 1461.94107) Full Text: DOI OpenURL
Kumm, Martin [Zipf, Peter] Multiple constant multiplication optimizations for field programmable gate arrays. With a preface by Prof. Dr.-Ing. Peter Zipf. (English) Zbl 1336.68004 Wiesbaden: Springer Vieweg (ISBN 978-3-658-13322-1/pbk; 978-3-658-13323-8/ebook). xxxiii, 206 p. (2016). MSC: 68-02 68M07 68M20 68W35 90C10 90C59 94A12 94C10 94C15 PDF BibTeX XML Cite \textit{M. Kumm}, Multiple constant multiplication optimizations for field programmable gate arrays. With a preface by Prof. Dr.-Ing. Peter Zipf. Wiesbaden: Springer Vieweg (2016; Zbl 1336.68004) Full Text: DOI OpenURL
Dolev, Danny; Függer, Matthias; Lenzen, Christoph; Perner, Martin; Schmid, Ulrich HEX: scaling honeycombs is easier than scaling clock trees. (English) Zbl 1345.68012 J. Comput. Syst. Sci. 82, No. 5, 929-956 (2016). Reviewer: Jozef Woźniak (Gdańsk) MSC: 68M07 68M12 68M15 94C12 PDF BibTeX XML Cite \textit{D. Dolev} et al., J. Comput. Syst. Sci. 82, No. 5, 929--956 (2016; Zbl 1345.68012) Full Text: DOI OpenURL
Geng, Xianya; Fang, Xianwen; Li, Dequan; Chu, Jing An efficient algorithm for widths of channel routing with given horizontal constraint graph. (English) Zbl 1339.94031 Ital. J. Pure Appl. Math. 35, 305-310 (2015). MSC: 94A40 94C15 68W35 05C85 PDF BibTeX XML Cite \textit{X. Geng} et al., Ital. J. Pure Appl. Math. 35, 305--310 (2015; Zbl 1339.94031) Full Text: Link OpenURL
Wimer, Shmuel Easy and difficult exact covering problems arising in VLSI power reduction by clock gating. (English) Zbl 1308.94124 Discrete Optim. 14, 104-110 (2014). MSC: 94C30 68R10 05C69 PDF BibTeX XML Cite \textit{S. Wimer}, Discrete Optim. 14, 104--110 (2014; Zbl 1308.94124) Full Text: DOI OpenURL
Burignat, Stéphane; Vermeirsch, Kenneth; de Vos, Alexis; Thomsen, Michael Kirkedal Garbageless reversible implementation of integer linear transformations. (English) Zbl 1451.68358 Glück, Robert (ed.) et al., Reversible computation. 4th international workshop, RC 2012, Copenhagen, Denmark, July 2–3, 2012. Revised papers. Berlin: Springer. Lect. Notes Comput. Sci. 7581, 160-170 (2013). MSC: 68W35 68Q06 PDF BibTeX XML Cite \textit{S. Burignat} et al., Lect. Notes Comput. Sci. 7581, 160--170 (2013; Zbl 1451.68358) Full Text: DOI Link OpenURL
Fernandes, Johnson; Koutny, Maciej; Pietkiewicz-Koutny, Marta; Sokolov, Danil; Yakovlev, Alex Step persistence in the design of GALS systems. (English) Zbl 1381.68200 Colom, José-Manuel (ed.) et al., Application and theory of Petri nets and concurrency. 34th international conference, PETRI NETS 2013, Milan, Italy, June 24–28, 2013. Proceedings. Berlin: Springer (ISBN 978-3-642-38696-1/pbk). Lecture Notes in Computer Science 7927, 190-209 (2013). MSC: 68Q85 68Q60 PDF BibTeX XML Cite \textit{J. Fernandes} et al., Lect. Notes Comput. Sci. 7927, 190--209 (2013; Zbl 1381.68200) Full Text: DOI Link OpenURL
Vilcu, Adrian A hybrid genetic algorithm for a combinational circuits partitioning problem. (English) Zbl 1363.68174 Bul. Inst. Politeh. Iași, Secția Autom. Calc. 58(62), No. 3, 43-51 (2012). MSC: 68T20 94C10 94C12 PDF BibTeX XML Cite \textit{A. Vilcu}, Bul. Inst. Politeh. Iași, Secția Autom. Calc. 58(62), No. 3, 43--51 (2012; Zbl 1363.68174) OpenURL
Campobello, Giuseppe; Patanè, Giuseppe; Russo, Marco On the complexity of min-max sorting networks. (English) Zbl 1248.68179 Inf. Sci. 190, 178-191 (2012). MSC: 68P10 68Q25 68W35 PDF BibTeX XML Cite \textit{G. Campobello} et al., Inf. Sci. 190, 178--191 (2012; Zbl 1248.68179) Full Text: DOI OpenURL
Rahaman, Hafizur (ed.); Chattopadhyay, Sanatan (ed.); Chattopadhyay, Santanu (ed.) Progress in VLSI design and test. 16th international symposium, VDAT 2012, Shibpur, India, July 1–4, 2012. Proceedings. (English) Zbl 1248.94011 Lecture Notes in Computer Science 7373. Berlin: Springer (ISBN 978-3-642-31493-3/pbk). xxii, 408 p. (2012). MSC: 94-06 68-06 68W35 94C10 94C12 00B25 PDF BibTeX XML Cite \textit{H. Rahaman} (ed.) et al., Progress in VLSI design and test. 16th international symposium, VDAT 2012, Shibpur, India, July 1--4, 2012. Proceedings. Berlin: Springer (2012; Zbl 1248.94011) Full Text: DOI OpenURL
Van, Lan-Da; Sheu, Ten-Yao A power-area efficient geometry engine with low-complexity subdivision algorithm for 3-D graphics system. (English) Zbl 1468.94936 IEEE Trans. Circuits Syst. I, Regul. Pap. 58, No. 9, 2211-2224 (2011). MSC: 94C30 65D18 65Y04 68W35 PDF BibTeX XML Cite \textit{L.-D. Van} and \textit{T.-Y. Sheu}, IEEE Trans. Circuits Syst. I, Regul. Pap. 58, No. 9, 2211--2224 (2011; Zbl 1468.94936) Full Text: DOI OpenURL
Chang, Li-Yuan; Chen, Pei-Yin; Wang, Tsang-Yi; Chen, Ching-Sung A low-cost VLSI architecture for robust distributed estimation in wireless sensor networks. (English) Zbl 1468.94902 IEEE Trans. Circuits Syst. I, Regul. Pap. 58, No. 6, 1277-1286 (2011). MSC: 94C12 68W35 PDF BibTeX XML Cite \textit{L.-Y. Chang} et al., IEEE Trans. Circuits Syst. I, Regul. Pap. 58, No. 6, 1277--1286 (2011; Zbl 1468.94902) Full Text: DOI OpenURL
Gestner, Brian; Zhang, Wei; Ma, Xiaoli; Anderson, David V. Lattice reduction for MIMO detection: from theoretical analysis to hardware realization. (English) Zbl 1468.94308 IEEE Trans. Circuits Syst. I, Regul. Pap. 58, No. 4, 813-826 (2011). MSC: 94A13 65Y99 94C30 68W35 PDF BibTeX XML Cite \textit{B. Gestner} et al., IEEE Trans. Circuits Syst. I, Regul. Pap. 58, No. 4, 813--826 (2011; Zbl 1468.94308) Full Text: DOI OpenURL
Liao, Chen; Hu, Shiyan Approximation scheme for restricted discrete gate sizing targeting delay minimization. (English) Zbl 1319.94121 J. Comb. Optim. 21, No. 4, 497-510 (2011). MSC: 94C15 90C27 PDF BibTeX XML Cite \textit{C. Liao} and \textit{S. Hu}, J. Comb. Optim. 21, No. 4, 497--510 (2011; Zbl 1319.94121) Full Text: DOI OpenURL
Wimer, Shmuel; Moiseev, Konstantin; Kolodny, Avinoam On VLSI interconnect optimization and linear ordering problem. (English) Zbl 1284.94168 Optim. Eng. 12, No. 4, 603-609 (2011). MSC: 94C99 PDF BibTeX XML Cite \textit{S. Wimer} et al., Optim. Eng. 12, No. 4, 603--609 (2011; Zbl 1284.94168) Full Text: DOI OpenURL
Das, Ananda Swarup; Gupta, Prosenjit; Srinathan, Kannan Data structures for extension violations in a query range. (English) Zbl 1232.68190 J. Math. Model. Algorithms 10, No. 1, 79-107 (2011). MSC: 68W35 94C30 68U05 PDF BibTeX XML Cite \textit{A. S. Das} et al., J. Math. Model. Algorithms 10, No. 1, 79--107 (2011; Zbl 1232.68190) Full Text: DOI OpenURL
Popa, Cosmin Radu Synthesis of computational structures for analog signal processing. (English) Zbl 1235.94008 New York, NY: Springer (ISBN 978-1-4614-0402-6/hbk; 978-1-4614-0403-3/ebook). xv, 449 p. (2011). MSC: 94-02 94A12 94C05 PDF BibTeX XML Cite \textit{C. R. Popa}, Synthesis of computational structures for analog signal processing. New York, NY: Springer (2011; Zbl 1235.94008) Full Text: DOI OpenURL
Tomczak, Tadeusz Hierarchical residue number systems with small moduli and simple converters. (English) Zbl 1221.94108 Int. J. Appl. Math. Comput. Sci. 21, No. 1, 173-192 (2011). MSC: 94C99 11A07 11Y99 68M07 PDF BibTeX XML Cite \textit{T. Tomczak}, Int. J. Appl. Math. Comput. Sci. 21, No. 1, 173--192 (2011; Zbl 1221.94108) Full Text: DOI EuDML OpenURL
Gill, S. S.; Aneja, B.; Chandel, R.; Chandel, A. Simulated annealing based VLSI circuit partitioning for delay minimization. (English) Zbl 1231.94102 Grigoriu, Mircea (ed.) et al., Recent advances in computational intelligence. Proceedings of the 4th WSEAS international conference on computational intelligence (CI’10), Bucharest, Romania, April 20–22, 2010. Athens: World Scientific and Engineering Academy and Society (WSEAS) (ISBN 978-960-474-183-0/CD-ROM; 978-960-474-179-3/hbk). Electrical and Computer Engineering Series. A Series of Reference Books, 60-63 (2010). MSC: 94C99 PDF BibTeX XML Cite \textit{S. S. Gill} et al., in: Recent advances in computational intelligence. Proceedings of the 4th WSEAS international conference on computational intelligence (CI'10), Bucharest, Romania, April 20--22, 2010. Athens: World Scientific and Engineering Academy and Society (WSEAS). 60--63 (2010; Zbl 1231.94102) OpenURL
Alioto, Massimo; Palumbo, Gaetano; Poli, Massimo Simple and accurate modeling of the output transition time in nanometer CMOS gates. (English) Zbl 1205.94141 Int. J. Circuit Theory Appl. 38, No. 10, 995-1012 (2010). MSC: 94C30 PDF BibTeX XML Cite \textit{M. Alioto} et al., Int. J. Circuit Theory Appl. 38, No. 10, 995--1012 (2010; Zbl 1205.94141) Full Text: DOI OpenURL
Wang, Chunyan Wide-dynamic-range and high-sensitivity current-to-voltage converters. (English) Zbl 1200.94071 Circuits Syst. Signal Process. 29, No. 6, 1223-1236 (2010). MSC: 94C99 94A12 68W35 PDF BibTeX XML Cite \textit{C. Wang}, Circuits Syst. Signal Process. 29, No. 6, 1223--1236 (2010; Zbl 1200.94071) Full Text: DOI Link OpenURL
Chen, Ying-Chieh; Li, Yiming Temperature-aware floorplanning via geometric programming. (English) Zbl 1193.90227 Math. Comput. Modelling 51, No. 7-8, 927-934 (2010). MSC: 90C90 90C35 94C30 PDF BibTeX XML Cite \textit{Y.-C. Chen} and \textit{Y. Li}, Math. Comput. Modelling 51, No. 7--8, 927--934 (2010; Zbl 1193.90227) Full Text: DOI OpenURL
Avci, Mutlu; Yamacli, Serhan An improved elmore delay model for VLSI interconnects. (English) Zbl 1193.94089 Math. Comput. Modelling 51, No. 7-8, 908-914 (2010). MSC: 94C30 PDF BibTeX XML Cite \textit{M. Avci} and \textit{S. Yamacli}, Math. Comput. Modelling 51, No. 7--8, 908--914 (2010; Zbl 1193.94089) Full Text: DOI OpenURL
Lin, Youn-Long Steve; Kao, Chao-Yang; Kuo, Hung-Chih; Chen, Jian-Wen VLSI design for video coding. H.264/AVC encoding from standard specification to chip. (English) Zbl 1191.94003 Berlin: Springer (ISBN 978-1-4419-0958-9/hbk; 978-1-4419-0959-6/ebook). xi, 176 p. (2010). Reviewer: Eleonor Ciurea (Braşov) MSC: 94-02 68W35 94A29 68P30 94C30 PDF BibTeX XML Cite \textit{Y.-L. S. Lin} et al., VLSI design for video coding. H.264/AVC encoding from standard specification to chip. Berlin: Springer (2010; Zbl 1191.94003) Full Text: DOI OpenURL
Al-Rabadi, Anas N. Game reversibility in decision space and error-control coding. (English) Zbl 1368.91039 Int. J. Math. Game Theory Algebra 18, No. 2, 121-144 (2009). MSC: 91A28 94B05 PDF BibTeX XML Cite \textit{A. N. Al-Rabadi}, Int. J. Math. Game Theory Algebra 18, No. 2, 121--144 (2009; Zbl 1368.91039) OpenURL
Arpasi, Jorge Pedraza Fundamentals of ternary logic. (English) Zbl 1185.03039 Far East J. Math. Sci. (FJMS) 34, No. 3, 289-302 (2009). MSC: 03B50 94C10 PDF BibTeX XML Cite \textit{J. P. Arpasi}, Far East J. Math. Sci. (FJMS) 34, No. 3, 289--302 (2009; Zbl 1185.03039) Full Text: Link OpenURL
Li, Qingwei; Wang, Zhongfeng Reduced complexity \(K\) -best sphere decoder design for MIMO systems. (English) Zbl 1174.94423 Circuits Syst. Signal Process. 27, No. 4, 491-505 (2008). MSC: 94C30 PDF BibTeX XML Cite \textit{Q. Li} and \textit{Z. Wang}, Circuits Syst. Signal Process. 27, No. 4, 491--505 (2008; Zbl 1174.94423) Full Text: DOI OpenURL
Dean, Alice M.; Ellis-Monaghan, Joanna A.; Hamilton, Sarah; Pangborn, Greta Unit rectangle visibility graphs. (English) Zbl 1179.05076 Electron. J. Comb. 15, No. 1, Research Paper R79, 24 p. (2008). MSC: 05C62 05C85 68R10 68W35 94C15 PDF BibTeX XML Cite \textit{A. M. Dean} et al., Electron. J. Comb. 15, No. 1, Research Paper R79, 24 p. (2008; Zbl 1179.05076) Full Text: arXiv EuDML EMIS OpenURL
Kaeslin, Hubert Digital integrated circuit design. From VLSI architectures to CMOS fabrication. (English) Zbl 1155.94028 Cambridge: Cambridge University Press (ISBN 978-0-521-88267-5/hbk). xxiii, 845 p. (2008). Reviewer: Eleonor Ciurea (Braşov) MSC: 94Cxx 94-02 68W35 PDF BibTeX XML Cite \textit{H. Kaeslin}, Digital integrated circuit design. From VLSI architectures to CMOS fabrication. Cambridge: Cambridge University Press (2008; Zbl 1155.94028) OpenURL
Bhaduri, Debayan; Shukla, Sandeep K.; Graham, Paul S.; Gokhale, Maya B. Reliability analysis of large circuits using scalable techniques and tools. (English) Zbl 1374.94961 IEEE Trans. Circuits Syst. I, Regul. Pap. 54, No. 11, 2447-2460 (2007). MSC: 94C12 68W35 68M15 PDF BibTeX XML Cite \textit{D. Bhaduri} et al., IEEE Trans. Circuits Syst. I, Regul. Pap. 54, No. 11, 2447--2460 (2007; Zbl 1374.94961) Full Text: DOI OpenURL
Al-Yamani, Ahmad A.; Ramsundar, Sundarkumar; Pradhan, Dhiraj K. A defect tolerance scheme for nanotechnology circuits. (English) Zbl 1374.94960 IEEE Trans. Circuits Syst. I, Regul. Pap. 54, No. 11, 2402-2409 (2007). MSC: 94C12 68W35 PDF BibTeX XML Cite \textit{A. A. Al-Yamani} et al., IEEE Trans. Circuits Syst. I, Regul. Pap. 54, No. 11, 2402--2409 (2007; Zbl 1374.94960) Full Text: DOI OpenURL
Abeysekera, Saman S. Recursive Laguerre and Kalman filters as efficient full-rate sigma-delta \((\varSigma -\varDelta )\) demodulators. (English) Zbl 1186.94030 Signal Process. 87, No. 3, 417-431 (2007). MSC: 94A12 PDF BibTeX XML Cite \textit{S. S. Abeysekera}, Signal Process. 87, No. 3, 417--431 (2007; Zbl 1186.94030) Full Text: DOI OpenURL
Hosangadi, Anup; Fallah, Farzan; Kastner, Ryan Algebraic methods for optimizing constant multiplications in linear systems. (English) Zbl 1134.68605 J. VLSI Signal Process. Syst. Signal Image Video Technol. 49, No. 1, 31-50 (2007). MSC: 68W35 94C99 68M20 PDF BibTeX XML Cite \textit{A. Hosangadi} et al., J. VLSI Signal Process. Syst. Signal Image Video Technol. 49, No. 1, 31--50 (2007; Zbl 1134.68605) Full Text: DOI OpenURL
Ercegovac, Miloš D.; Muller, Jean-Michel Complex square root with operand prescaling. (English) Zbl 1134.68604 J. VLSI Signal Process. Syst. Signal Image Video Technol. 49, No. 1, 19-30 (2007). MSC: 68W35 94C99 68M20 68M07 PDF BibTeX XML Cite \textit{M. D. Ercegovac} and \textit{J.-M. Muller}, J. VLSI Signal Process. Syst. Signal Image Video Technol. 49, No. 1, 19--30 (2007; Zbl 1134.68604) Full Text: DOI Link OpenURL
Remón, Alfredo; Quintana-Ortí, Enrique S.; Quintana-Ortí, Gregorio Solution of band linear systems in model reduction for VSLI circuits. (English) Zbl 1130.78013 Ciuprina, Gabriela (ed.) et al., Scientific computing in electrical engineering SCEE 2006. Selected papers based on the presentations at the 6th international conference, Sinaia, Romania, September 17–22, 2006. Berlin: Springer (ISBN 978-3-540-71979-3/hbk). Mathematics in Industry 11, 387-393 (2007). MSC: 78A55 78M25 65F05 65F50 65L80 65Y05 PDF BibTeX XML Cite \textit{A. Remón} et al., Math. Ind. 11, 387--393 (2007; Zbl 1130.78013) Full Text: DOI OpenURL
Mansour, Mohammad M.; Shanbhag, Naresh R. A novel design methodology for high-performance programmable decoder cores for AA-LDPC codes. (English) Zbl 1103.94305 J. VLSI Signal Process. Syst. Signal Image Video Technol. 40, No. 3, 371-382 (2005). MSC: 94B35 68P30 94C15 68W35 PDF BibTeX XML Cite \textit{M. M. Mansour} and \textit{N. R. Shanbhag}, J. VLSI Signal Process. Syst. Signal Image Video Technol. 40, No. 3, 371--382 (2005; Zbl 1103.94305) Full Text: DOI OpenURL
Jeong, Sug H.; Sunwoo, Myung H.; Oh, Seong K. Bit manipulation accelerator for communication systems digital signal processor. (English) Zbl 1141.68721 EURASIP J. Appl. Signal Process. 2005, No. 16, 2655-2663 (2005). MSC: 68W35 68M99 94C99 PDF BibTeX XML Cite \textit{S. H. Jeong} et al., EURASIP J. Appl. Signal Process. 2005, No. 16, 2655--2663 (2005; Zbl 1141.68721) Full Text: DOI OpenURL
Gross, Warren J.; Kschischang, Frank R.; Kötter, Ralf; Gulak, P. Glenn Towards a VLSI architecture for interpolation-based soft-decision Reed-Solomon decoders. (English) Zbl 1084.94525 J. VLSI Signal Process. Syst. Signal Image Video Technol. 39, No. 1-2, 93-111 (2005). MSC: 94B35 94B15 94B05 PDF BibTeX XML Cite \textit{W. J. Gross} et al., J. VLSI Signal Process. Syst. Signal Image Video Technol. 39, No. 1--2, 93--111 (2005; Zbl 1084.94525) Full Text: DOI OpenURL
Freund, Roland W. RCL circuit equations. (English) Zbl 1088.94037 Benner, Peter (ed.) et al., Dimension reduction of large-scale systems. Proceedings of a workshop, Oberwolfach, Germany, October 19–25, 2003. Berlin: Springer (ISBN 3-540-24545-6/pbk). Lecture Notes in Computational Science and Engineering 45, 367-371 (2005). MSC: 94C05 PDF BibTeX XML Cite \textit{R. W. Freund}, Lect. Notes Comput. Sci. Eng. 45, 367--371 (2005; Zbl 1088.94037) OpenURL
Chiang, Yi-Ting; Lin, Ching-Chi; Lu, Hsueh-I Orderly spanning trees with applications. (English) Zbl 1069.05054 SIAM J. Comput. 34, No. 4, 924-945 (2005). MSC: 05C62 05C85 68P05 68W35 68U05 68R10 94C15 PDF BibTeX XML Cite \textit{Y.-T. Chiang} et al., SIAM J. Comput. 34, No. 4, 924--945 (2005; Zbl 1069.05054) Full Text: DOI OpenURL
Thornton, M. A. Mixed-radix representation of MVL functions by spectral and decision diagrams. (English. Russian original) Zbl 1083.94029 Autom. Remote Control 65, No. 6, 1007-1017 (2004); translation from Avtom. Telemekh. 2004, No. 6, 188-200 (2004). MSC: 94C10 68W35 PDF BibTeX XML Cite \textit{M. A. Thornton}, Autom. Remote Control 65, No. 6, 1007--1017 (2004; Zbl 1083.94029); translation from Avtom. Telemekh. 2004, No. 6, 188--200 (2004) Full Text: DOI OpenURL
Shi, Bertram E. Oriented spatial pattern formation in a four layer CMOS cellular neural network. (English) Zbl 1086.37536 Int. J. Bifurcation Chaos Appl. Sci. Eng. 14, No. 4, 1209-1221 (2004). MSC: 37N99 37B15 94C05 68T05 PDF BibTeX XML Cite \textit{B. E. Shi}, Int. J. Bifurcation Chaos Appl. Sci. Eng. 14, No. 4, 1209--1221 (2004; Zbl 1086.37536) Full Text: DOI OpenURL
Lin, Ching-Chi; Lu, Hsueh-I; Sun, I-Fan Improved compact visibility representation of planar graphs via Schnyder’s realizer. (English) Zbl 1068.05046 SIAM J. Discrete Math. 18, No. 1, 19-29 (2004). MSC: 05C62 05C85 68W35 68U05 68R10 94C15 PDF BibTeX XML Cite \textit{C.-C. Lin} et al., SIAM J. Discrete Math. 18, No. 1, 19--29 (2004; Zbl 1068.05046) Full Text: DOI OpenURL
Liu, Rui; Dong, She-Qin; Hong, Xian-Long; Gu, Jun Two-dimensional stack generation and block merging algorithms for analog VLSI. (English) Zbl 1054.94520 J. Softw. 15, No. 5, 641-649 (2004). MSC: 94C05 68W35 94C15 PDF BibTeX XML Cite \textit{R. Liu} et al., J. Softw. 15, No. 5, 641--649 (2004; Zbl 1054.94520) OpenURL
Molitor, Paul; Mohnke, Janett [Becker, Bernd; Scholl, Christoph] Equivalence checking of digital circuits. Fundamentals, principles, methods. With guest authors Bernd Becker and Christoph Scholl. (English) Zbl 1053.68020 Boston, MA: Kluwer Academic Publishers (ISBN 1-4020-7725-4/hbk). xiii, 262 p. (2004). MSC: 68M99 68-01 PDF BibTeX XML Cite \textit{P. Molitor} and \textit{J. Mohnke}, Equivalence checking of digital circuits. Fundamentals, principles, methods. With guest authors Bernd Becker and Christoph Scholl. Boston, MA: Kluwer Academic Publishers (2004; Zbl 1053.68020) OpenURL
McEwan, Alistair; van Schaik, André An analogue VLSI implementation of the Meddis inner hair cell model. (English) Zbl 1058.94529 EURASIP J. Appl. Signal Process. 2003, No. 7, 639-648 (2003). MSC: 94C05 68T05 92C20 68W35 PDF BibTeX XML Cite \textit{A. McEwan} and \textit{A. van Schaik}, EURASIP J. Appl. Signal Process. 2003, No. 7, 639--648 (2003; Zbl 1058.94529) Full Text: DOI OpenURL
Aloisi, W.; Giustolisi, G.; Palumbo, G. Analysis, modelling and optimization of a gain boosted telescopic amplifier. (English) Zbl 1035.94540 Int. J. Circuit Theory Appl. 31, No. 5, 513-528 (2003). MSC: 94C05 PDF BibTeX XML Cite \textit{W. Aloisi} et al., Int. J. Circuit Theory Appl. 31, No. 5, 513--528 (2003; Zbl 1035.94540) Full Text: DOI OpenURL
Anis, Mohab; Elmasry, Mohamed Multi-threshold CMOS digital circuits. Managing leakage power. (English) Zbl 1041.94017 Boston, MA: Kluwer Academic Publishers (ISBN 1-4020-7529-4/hbk). xxiii, 216 p. (2003). Reviewer: A. V. Chashkin (Moskva) MSC: 94C05 68M20 94-01 PDF BibTeX XML Cite \textit{M. Anis} and \textit{M. Elmasry}, Multi-threshold CMOS digital circuits. Managing leakage power. Boston, MA: Kluwer Academic Publishers (2003; Zbl 1041.94017) OpenURL
Dziurzanski, P.; Malyugin, V.; Shmerko, V.; Yanushkevich, S. Linear models of circuits based on the multivalued components. (English. Russian original) Zbl 1074.94524 Autom. Remote Control 63, No. 6, 960-980 (2002); translation from Avtom. Telemekh. 2002, No. 6, 99-119 (2002). MSC: 94C05 PDF BibTeX XML Cite \textit{P. Dziurzanski} et al., Autom. Remote Control 63, No. 6, 960--980 (2002; Zbl 1074.94524); translation from Avtom. Telemekh. 2002, No. 6, 99--119 (2002) Full Text: DOI OpenURL
Fanucci, L.; Forliti, M.; Terreni, P. FAST: FFT ASIC automated synthesis. (English) Zbl 1011.68012 Integr., VLSI J. 33, No. 1-2, 23-37 (2002). MSC: 68M99 94A12 PDF BibTeX XML Cite \textit{L. Fanucci} et al., Integr., VLSI J. 33, No. 1--2, 23--37 (2002; Zbl 1011.68012) Full Text: DOI OpenURL
Youn, Hee Yong; Oh, Choong Gun; Choo, Hyunseung; Chung, Jin-Wook; Lee, Dongman An efficient algorithm-based fault tolerance design using the weighted data-check relationship. (English) Zbl 1391.94939 IEEE Trans. Comput. 50, No. 4, 371-383 (2001). MSC: 94C12 68W35 68M15 PDF BibTeX XML Cite \textit{H. Y. Youn} et al., IEEE Trans. Comput. 50, No. 4, 371--383 (2001; Zbl 1391.94939) Full Text: DOI OpenURL
Baldick, Ross; Kahng, Andrew B.; Kennings, Andrew; Markov, Igor L. Efficient optimization by modifying the objective function: Applications to timing-driven VLSI layout. (English) Zbl 1017.90088 IEEE Trans. Circuits Syst., I, Fundam. Theory Appl. 48, No. 8, 947-956 (2001). MSC: 90C27 94C99 PDF BibTeX XML Cite \textit{R. Baldick} et al., IEEE Trans. Circuits Syst., I, Fundam. Theory Appl. 48, No. 8, 947--956 (2001; Zbl 1017.90088) Full Text: DOI Link OpenURL
Fanucci, L.; Saponara, S.; Bertini, L. A parametric VLSI architecture for video motion estimation. (English) Zbl 0995.68524 Integr., VLSI J. 31, No. 1, 79-100 (2001). MSC: 68U99 68W35 PDF BibTeX XML Cite \textit{L. Fanucci} et al., Integr., VLSI J. 31, No. 1, 79--100 (2001; Zbl 0995.68524) Full Text: DOI OpenURL
Hu, Jiang; Sapatnekar, Sachin S. A survey on multi-net global routing for integrated circuits. (English) Zbl 0995.68197 Integr., VLSI J. 31, No. 1, 1-49 (2001). MSC: 68W35 PDF BibTeX XML Cite \textit{J. Hu} and \textit{S. S. Sapatnekar}, Integr., VLSI J. 31, No. 1, 1--49 (2001; Zbl 0995.68197) Full Text: DOI OpenURL
Bibilo, Pyotr; Kirienko, Natalia Bloch synthesis of combinational circuits in the basis of PLA and library gates. (English) Zbl 0996.68868 Adamski, Marian (ed.) et al., Proceedings of the international workshop on discrete-event system design. DESDes ’01, Przytok near Zielona Góra, Poland, June 27-29, 2001. Zielona Góra: TU of Zielona Góra, Computer Engineering and Electronics Institute. 181-186 (2001). MSC: 68W35 68M99 PDF BibTeX XML Cite \textit{P. Bibilo} and \textit{N. Kirienko}, in: Proceedings of the international workshop on discrete-event system design. DESDes '01, Przytok near Zielona Góra, Poland, June 27--29, 2001. Zielona Góra: TU of Zielona Góra, Computer Engineering and Electronics Institute. 181--186 (2001; Zbl 0996.68868) OpenURL
Brzozowski, Ireneusz; Kos, Andrzej Logic synthesis method for power dissipation reduction in combinational digital circuits. (English) Zbl 0997.94555 Bull. Pol. Acad. Sci., Tech. Sci. 49, No. 4, 581-594 (2001). MSC: 94C05 PDF BibTeX XML Cite \textit{I. Brzozowski} and \textit{A. Kos}, Bull. Pol. Acad. Sci., Tech. Sci. 49, No. 4, 581--594 (2001; Zbl 0997.94555) OpenURL
Tsukiji, T.; Mahmoud, H. A limit law for outputs in random recursive circuits. (English) Zbl 0989.68107 Algorithmica 31, No. 3, 403-412 (2001). MSC: 68R10 68W35 PDF BibTeX XML Cite \textit{T. Tsukiji} and \textit{H. Mahmoud}, Algorithmica 31, No. 3, 403--412 (2001; Zbl 0989.68107) Full Text: DOI OpenURL
Rosenberg, Arnold L.; Heath, Lenwood S. Graph separators, with applications. (English) Zbl 0981.68119 Frontiers of Computer Science. New York, NY: Kluwer Academic/Plenum Publishers. xii, 257 p. (2001). Reviewer: Bohdan Zelinka (Liberec) MSC: 68R10 68-02 05C65 PDF BibTeX XML Cite \textit{A. L. Rosenberg} and \textit{L. S. Heath}, Graph separators, with applications. New York, NY: Kluwer Academic/Plenum Publishers (2001; Zbl 0981.68119) OpenURL
Mehendale, Mahesh; Sherlekar, Sunil D. VLSI synthesis of DSP kernels. Algorithmic and architectural transformations. (English) Zbl 1050.94004 Boston: Kluwer Academic Publishers (ISBN 0-7923-7421-5). xxiii, 209 p. (2001). Reviewer: Neculai Curteanu (Iaşi) MSC: 94A12 94A05 68W35 94C30 68Q10 92C55 94-04 PDF BibTeX XML Cite \textit{M. Mehendale} and \textit{S. D. Sherlekar}, VLSI synthesis of DSP kernels. Algorithmic and architectural transformations. Boston: Kluwer Academic Publishers (2001; Zbl 1050.94004) OpenURL
Cullum, J. K.; Ruehli, A. E. Pseudospectra analysis, nonlinear eigenvalue problems, and studying linear systems with delays. (English) Zbl 0985.65095 BIT 41, No. 2, 265-281 (2001). Reviewer: Ziwen Jiang (Shandong) MSC: 65L80 34K20 65L07 34A09 34K28 PDF BibTeX XML Cite \textit{J. K. Cullum} and \textit{A. E. Ruehli}, BIT 41, No. 2, 265--281 (2001; Zbl 0985.65095) Full Text: DOI OpenURL
Schröder, Hartmut; Blume, Holger Multidimensional signal processing. Vol. 2: Architectures and applications for images and image sequences. (Mehrdimensionale Signalverarbeitung. Band 2: Architekturen und Anwendungen für Bilder und Bildsequenzen.) (German) Zbl 1052.94503 Leipzig: Teubner (ISBN 3-519-06197-X/hbk). xii, 472 S. (2000). MSC: 94A12 94-01 94A08 PDF BibTeX XML Cite \textit{H. Schröder} and \textit{H. Blume}, Mehrdimensionale Signalverarbeitung. Band 2: Architekturen und Anwendungen für Bilder und Bildsequenzen. Leipzig: Teubner (2000; Zbl 1052.94503) OpenURL
Boahen, Kwabena Point-to-point connectivity between neuromorphic chips using address events. (English) Zbl 1003.94538 IEEE Trans. Circuits Syst., II, Analog Digit. Signal Process. 47, No. 5, 416-434 (2000). MSC: 94C05 68M07 94A40 68T05 PDF BibTeX XML Cite \textit{K. Boahen}, IEEE Trans. Circuits Syst., II, Analog Digit. Signal Process. 47, No. 5, 416--434 (2000; Zbl 1003.94538) Full Text: DOI Link OpenURL
Xu, Shiyi; Frank, Tukwasibwe Justaf Forecasting the efficiency of test generation algorithms for combinational circuits. (English) Zbl 0969.68635 J. Comput. Sci. Technol. 15, No. 4, 326-337 (2000). MSC: 68U99 68W35 94C10 94C12 PDF BibTeX XML Cite \textit{S. Xu} and \textit{T. J. Frank}, J. Comput. Sci. Technol. 15, No. 4, 326--337 (2000; Zbl 0969.68635) Full Text: DOI OpenURL
Lengauer, T.; Lügering, M. Provably good global routing of integrated circuits. (English) Zbl 0999.90033 SIAM J. Optim. 11, No. 1, 1-30 (2000). MSC: 90C27 90C35 05C85 68W35 PDF BibTeX XML Cite \textit{T. Lengauer} and \textit{M. Lügering}, SIAM J. Optim. 11, No. 1, 1--30 (2000; Zbl 0999.90033) Full Text: DOI OpenURL
Brazil, M.; Thomas, D. A.; Weng, J. F. Minimum networks in uniform orientation metrics. (English) Zbl 0973.05022 SIAM J. Comput. 30, No. 5, 1579-1593 (2000). MSC: 05C05 90B99 94C15 PDF BibTeX XML Cite \textit{M. Brazil} et al., SIAM J. Comput. 30, No. 5, 1579--1593 (2000; Zbl 0973.05022) Full Text: DOI OpenURL
Nandy, Subhas C.; Bhattacharya, Bhargab B.; Hernández-Barrera, Antonio Safety zone problem. (English) Zbl 0964.68141 J. Algorithms 37, No. 2, 538-569 (2000). MSC: 68U05 68W35 PDF BibTeX XML Cite \textit{S. C. Nandy} et al., J. Algorithms 37, No. 2, 538--569 (2000; Zbl 0964.68141) Full Text: DOI OpenURL
Tang, K. T.; Friedman, E. G. Delay and noise estimation of CMOS logic gates driving coupled resistive–capacitive interconnections. (English) Zbl 0952.68167 Integr., VLSI J. 29, No. 2, 131-165 (2000). MSC: 68W35 PDF BibTeX XML Cite \textit{K. T. Tang} and \textit{E. G. Friedman}, Integr., VLSI J. 29, No. 2, 131--165 (2000; Zbl 0952.68167) Full Text: DOI OpenURL
Diguet, J. Ph.; Chillet, D.; Sentieys, O. A framework for high level estimations of signal processing VLSI implementations. (English) Zbl 0959.68555 J. VLSI Signal Process. Syst. Signal Image Video Technol. 25, No. 3, 261-284 (2000). MSC: 68W35 PDF BibTeX XML Cite \textit{J. Ph. Diguet} et al., J. VLSI Signal Process. Syst. Signal Image Video Technol. 25, No. 3, 261--284 (2000; Zbl 0959.68555) Full Text: DOI OpenURL
Pätow, Heinz; Siemers, Christian; Wismüller, Roland Märtin, Christian (ed.) Computer architecture. CPUs, systems, interfaces of software. (Rechnerarchitekturen. CPUs, Systeme, Software-Schnittstellen. Inkl. 1 CD-ROM.) (German) Zbl 0963.68002 München: Fachbuchverlag Leipzig im Carl Hanser Verlag. xvi, 478 p. (2000). Reviewer: A.Michalski (Warszawa) MSC: 68M01 68-02 68M99 PDF BibTeX XML Cite \textit{H. Pätow} et al., Rechnerarchitekturen. CPUs, Systeme, Software-Schnittstellen. Inkl. 1 CD-ROM. München: Fachbuchverlag Leipzig im Carl Hanser Verlag (2000; Zbl 0963.68002) OpenURL
Kourtev, I. S.; Friedman, Eby G. Timing optimization through clock skew scheduling. (English) Zbl 0953.68003 Boston: Kluwer Academic Publishers. xix, 194 p. (2000). Reviewer: Christina Diakaki (Chania) MSC: 68M10 94C99 90C05 90C20 68W35 PDF BibTeX XML Cite \textit{I. S. Kourtev} and \textit{E. G. Friedman}, Timing optimization through clock skew scheduling. Boston: Kluwer Academic Publishers (2000; Zbl 0953.68003) OpenURL
Otten, R. H. J. M.; Brayton, R. K. Performance planning. (English) Zbl 0938.68981 Integr., VLSI J. 29, No. 1, 1-24 (2000). MSC: 68W35 PDF BibTeX XML Cite \textit{R. H. J. M. Otten} and \textit{R. K. Brayton}, Integr., VLSI J. 29, No. 1, 1--24 (2000; Zbl 0938.68981) Full Text: DOI OpenURL
Lin, Wei-Liang; Farrahi, Amir H.; Sarrafzadeh, M. On the power of logic resynthesis. (English) Zbl 0965.94032 SIAM J. Comput. 29, No. 4, 1257-1289 (2000). MSC: 94C15 94C10 68R05 68R10 68M07 94C30 PDF BibTeX XML Cite \textit{W.-L. Lin} et al., SIAM J. Comput. 29, No. 4, 1257--1289 (2000; Zbl 0965.94032) Full Text: DOI OpenURL
Plosila, Juha Self-timed circuit design – the action systems approach. (English) Zbl 1032.94534 Annales Universitatis Turkuensis. Ser. A I. 249. Turku: Turun Yliopisto. 260 p. (1999). MSC: 94C05 94-02 68M07 PDF BibTeX XML Cite \textit{J. Plosila}, Self-timed circuit design -- the action systems approach. Turku: Turun Yliopisto (1999; Zbl 1032.94534) OpenURL
Lin, Yen-Chun; Shih, Chao-Cheng A new class of depth-size optimal parallel prefix circuits. (English) Zbl 0941.68164 J. Supercomput. 14, No. 1, 39-52 (1999). MSC: 68W35 PDF BibTeX XML Cite \textit{Y.-C. Lin} and \textit{C.-C. Shih}, J. Supercomput. 14, No. 1, 39--52 (1999; Zbl 0941.68164) Full Text: DOI OpenURL
Gilg, Albert; Günther, Michael Numerical circuit simulation. (English) Zbl 0935.94033 Surv. Math. Ind. 8, No. 3-4, 165-169 (1999). MSC: 94C99 65C20 65C35 PDF BibTeX XML Cite \textit{A. Gilg} and \textit{M. Günther}, Surv. Math. Ind. 8, No. 3--4, 165--169 (1999; Zbl 0935.94033) OpenURL
Even, Guy; Naor, Joseph; Rao, Satish; Schieber, Baruch Fast approximate graph partitioning algorithms. (English) Zbl 0936.68109 SIAM J. Comput. 28, No. 6, 2187-2214 (1999). MSC: 68W05 05C85 68Q25 68W35 90C05 94C15 68R10 PDF BibTeX XML Cite \textit{G. Even} et al., SIAM J. Comput. 28, No. 6, 2187--2214 (1999; Zbl 0936.68109) Full Text: DOI OpenURL
Hromkovič, Juraj Communication complexity and lower bounds on multilective computations. (English) Zbl 0946.68052 Theor. Inform. Appl. 33, No. 2, 193-212 (1999). MSC: 68Q15 PDF BibTeX XML Cite \textit{J. Hromkovič}, Theor. Inform. Appl. 33, No. 2, 193--212 (1999; Zbl 0946.68052) Full Text: DOI Numdam EuDML OpenURL
Sherwani, Naveed A. Algorithms for VLSI physical design automation. 3rd ed. (English) Zbl 0926.68059 Boston, MA: Kluwer Academic Publishers. xxx, 572 p. (1999). MSC: 68W35 68W10 68-01 94-01 94C15 PDF BibTeX XML Cite \textit{N. A. Sherwani}, Algorithms for VLSI physical design automation. 3rd ed. Boston, MA: Kluwer Academic Publishers (1999; Zbl 0926.68059) OpenURL
Maheshwari, Naresh; Sapatnekar, Sachin S. Timing analysis and optimization of sequential circuits. (English) Zbl 0987.94002 Boston: Kluwer Academic Publishers. xv, 190 p. (1999). Reviewer: P.Molitor (Halle) MSC: 94-01 68-01 94C05 68W35 PDF BibTeX XML Cite \textit{N. Maheshwari} and \textit{S. S. Sapatnekar}, Timing analysis and optimization of sequential circuits. Boston: Kluwer Academic Publishers (1999; Zbl 0987.94002) OpenURL
Tan, Xuehou; Song, Xiaoyu Routing multiterminal nets on a hexagonal grid. (English) Zbl 0913.68105 Discrete Appl. Math. 90, No. 1-3, 245-255 (1999). MSC: 68W35 PDF BibTeX XML Cite \textit{X. Tan} and \textit{X. Song}, Discrete Appl. Math. 90, No. 1--3, 245--255 (1999; Zbl 0913.68105) Full Text: DOI Link OpenURL
Kahng, Andrew B.; Robins, Gabriel; Walkup, Elizabeth A. How to test a tree. (English) Zbl 1015.68019 Networks 32, No. 3, 189-197 (1998). MSC: 68M15 68R10 94C12 68W35 PDF BibTeX XML Cite \textit{A. B. Kahng} et al., Networks 32, No. 3, 189--197 (1998; Zbl 1015.68019) Full Text: DOI OpenURL
Duran, Paul A. A practical guide to analog behavioral modeling for IC system design. (English) Zbl 0927.68125 Boston: Kluwer Academic Publishers. 229 p. (1998). Reviewer: G.Bauer (Görlitz) MSC: 68W35 68-02 94C30 94-02 PDF BibTeX XML Cite \textit{P. A. Duran}, A practical guide to analog behavioral modeling for IC system design. Boston: Kluwer Academic Publishers (1998; Zbl 0927.68125) OpenURL
Bo, G. M.; Caviglia, D. D.; Valle, M.; Stratta, R.; Trucco, E. A reconfigurable analog VLSI neural network architecture with non-linear synapses. (English) Zbl 0915.68141 Int. J. Circuit Theory Appl. 26, No. 3, 307-315 (1998). MSC: 68T05 94C99 92B20 PDF BibTeX XML Cite \textit{G. M. Bo} et al., Int. J. Circuit Theory Appl. 26, No. 3, 307--315 (1998; Zbl 0915.68141) Full Text: DOI OpenURL
Nicolaidis, Michael On-line testing for VLSI: state of the art and trends. (English) Zbl 0908.68076 Integr., VLSI J. 26, No. 1-2, 197-209 (1998). MSC: 68W35 PDF BibTeX XML Cite \textit{M. Nicolaidis}, Integr., VLSI J. 26, No. 1--2, 197--209 (1998; Zbl 0908.68076) Full Text: DOI OpenURL
Tong, Maoda; Chen, Wai-kai Analysis of VLSI robust exponential stability with left coprime factorization. (English) Zbl 0909.94022 Circuits Syst. Signal Process. 17, No. 3, 335-360 (1998). MSC: 94C05 93D09 PDF BibTeX XML Cite \textit{M. Tong} and \textit{W.-k. Chen}, Circuits Syst. Signal Process. 17, No. 3, 335--360 (1998; Zbl 0909.94022) Full Text: DOI OpenURL
Sarkar, P.; Roy, B. K.; Choudhury, P. P.; Barua, R. Polynomial division using left shift register. (English) Zbl 0906.94014 Comput. Math. Appl. 35, No. 6, 27-31 (1998). MSC: 94A55 94C30 11T71 68W35 94B35 PDF BibTeX XML Cite \textit{P. Sarkar} et al., Comput. Math. Appl. 35, No. 6, 27--31 (1998; Zbl 0906.94014) Full Text: DOI OpenURL
Meinel, Christoph; Theobald, Thorsten Ordered binary decision diagrams and their significance in computer-aided design of VLSI circuits. (English) Zbl 0897.68114 Bull. EATCS 64, 171-187 (1998). MSC: 68U07 68U99 68M99 PDF BibTeX XML Cite \textit{C. Meinel} and \textit{T. Theobald}, Bull. EATCS 64, 171--187 (1998; Zbl 0897.68114) OpenURL
Benini, Luca; De Micheli, Giovanni Dynamic power management. Design techniques and CAD tools. (English) Zbl 0893.68161 Boston: Kluwer Academic Publishers. xiii, 231 p. (1998). Reviewer: J.Hromkovič (Aachen) MSC: 68U07 68-02 94-02 68M07 PDF BibTeX XML Cite \textit{L. Benini} and \textit{G. De Micheli}, Dynamic power management. Design techniques and CAD tools. Boston: Kluwer Academic Publishers (1998; Zbl 0893.68161) OpenURL
Savage, John E. Models of computation: exploring the power of computing. (English) Zbl 0890.68059 Reading, MA: Addison Wesley Longman. xxiii, 672 p. (1998). Reviewer: Jozsef Tankó (Budapest) MSC: 68Q10 68-01 68Q15 68N99 PDF BibTeX XML Cite \textit{J. E. Savage}, Models of computation: exploring the power of computing. Reading, MA: Addison Wesley Longman (1998; Zbl 0890.68059) OpenURL
Kushilevitz, Eyal; Nisan, Noam Communication complexity. (English) Zbl 0869.68048 Cambridge: Cambridge Univ. Press. xiii, 189 p. (1997). Reviewer: C.Damm (Trier) MSC: 68Q05 68-02 94A05 PDF BibTeX XML Cite \textit{E. Kushilevitz} and \textit{N. Nisan}, Communication complexity. Cambridge: Cambridge Univ. Press (1997; Zbl 0869.68048) Full Text: DOI OpenURL
Renaudin, Marc; Robin, Frédéric; Vivet, Pascal Asynchronism in a joint algorithm architecture perspective. (AAAA: Asynchronisme et adéquation algorithme architecture.) (French) Zbl 0987.68822 Trait. Signal 14, No. 6, 589-604 (1997). MSC: 68U99 68W35 PDF BibTeX XML Cite \textit{M. Renaudin} et al., Trait. Signal 14, No. 6, 589--604 (1997; Zbl 0987.68822) OpenURL
Vakilotojar, Vida; Beerel, Peter A. RTL verification of timed asynchronous and heterogeneous systems using symbolic model checking. (English) Zbl 0905.68081 Integr., VLSI J. 24, No. 1, 19-35 (1997). MSC: 68W35 68M99 PDF BibTeX XML Cite \textit{V. Vakilotojar} and \textit{P. A. Beerel}, Integr., VLSI J. 24, No. 1, 19--35 (1997; Zbl 0905.68081) Full Text: DOI OpenURL
Samudra, Ganesh; Lee, Teng Kiat A new modeling technique for mixed-mode simulation of CMOS circuits. (English) Zbl 0894.68013 Integr., VLSI J. 22, No. 1-2, 87-99 (1997). MSC: 68M99 PDF BibTeX XML Cite \textit{G. Samudra} and \textit{T. K. Lee}, Integr., VLSI J. 22, No. 1--2, 87--99 (1997; Zbl 0894.68013) Full Text: DOI OpenURL
Kosko, Bart Fuzzy engineering. With 1 disk. (English) Zbl 0895.94015 International Edition. Hemel Hempstead: Prentice Hall. xxvi, 549 p. (1997). Reviewer: W.Pedrycz (Winnipeg) MSC: 94D05 94-01 93C42 94-04 68U10 PDF BibTeX XML Cite \textit{B. Kosko}, Fuzzy engineering. With 1 disk. Hemel Hempstead: Prentice Hall (1997; Zbl 0895.94015) OpenURL
Areibi, Shawki; Vannelli, Anthony A GRASP clustering technique for circuit partitioning. (English) Zbl 0889.68080 Du, Dingzhu (ed.) et al., Satisfiability problem: theory and applications. DIMACS workshop, Piscataway, NJ, USA, March 11-13, 1996. Providence, RI: AMS, American Mathematical Society. DIMACS, Ser. Discrete Math. Theor. Comput. Sci. 35, 711-724 (1997). MSC: 68W35 68T20 90C11 PDF BibTeX XML Cite \textit{S. Areibi} and \textit{A. Vannelli}, DIMACS, Ser. Discrete Math. Theor. Comput. Sci. 35, 711--724 (1997; Zbl 0889.68080) OpenURL
Becerra, Juan J. (ed.); Friedman, Eby G. (ed.) Analog design issues in digital VLSI circuits and systems. Repr. from Analog Integrated Circuits and Signal Processing 14, No. 1-2(1997). (English) Zbl 0886.68015 Dordrecht: Kluwer Academic Publishers. 167 p. (1997). MSC: 68M99 68-06 00B15 PDF BibTeX XML Cite \textit{J. J. Becerra} (ed.) and \textit{E. G. Friedman} (ed.), Analog design issues in digital VLSI circuits and systems. Repr. from Analog Integrated Circuits and Signal Processing 14, No. 1-2(1997). Dordrecht: Kluwer Academic Publishers (1997; Zbl 0886.68015) OpenURL