swMATH ID: 1591
Software Authors: Abarbanel, Yael; Beer, Ilan; Gluhovsky, Leonid; Keidar, Sharon; Wolfsthal, Yaron
Description: FoCs – automatic generation of simulation checkers from formal specifications. For the foreseeable future, industrial hardware design will continue to use both simulation and model checking in the design verification process. To date, these techniques are applied in isolation using different tools and methodologies, and different formulations of the problem. This results in cumulative high cost and little (if any) cross-leverage of the individual advantages of simulation and formal verification
Homepage: http://www.springerlink.com/content/c458783128228w61/
Related Software: LTL2BA; HOL; SPIN; Copilot; JPAX; ANTLR; ML; MonPoly; Esterel; SIGNAL; Java-MOP; SPOT; z3; PMaude; Maude; AMT; PROSPER; NuSMV; SystemC; HANNIBAL
Cited in: 17 Publications

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