EPFL swMATH ID: 40313 Software Authors: Amarú, L., Gaillardon, P.-E., De Micheli, G. Description: The EPFL Combinational Benchmark Suite was introduced in 2015 with the aim of defining a new comparative standard for the logic optimization and synthesis community. It originally consisted of 23 combinational circuits designed to challenge modern logic optimization tools. The benchmark suite is divided into arithmetic, random/control and MtM circuits, and each circuit is distributed in Verilog, VHDL, BLIF and AIGER formats. Homepage: https://www.epfl.ch/labs/lsi/page-102566-en-html/benchmarks/ Source Code: https://github.com/lsils/benchmarks Related Software: Cited in: 1 Document Cited by 1 Author 1 Kaufmann, Daniela Cited in 0 Serials Cited in 1 Field 1 Computer science (68-XX) Citations by Year